ad1020ar资料 | |
ad1020ar |
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file size : 116 kb
manufacturer:adi description:once the deserializer has synchronized to the serializer, the lock pin transitions low. the deserializer locks to the embedded clock and uses it to recover the serialized data. rout data is valid when lock is low, otherwise rout0 c rout9 is invalid. the rout0crout9 data is strobed out by rclk. the specific rclk edge polarity to be used is selected by the rclk_r/f input. the rout0 c rout9, lock and rclk outputs can drive a maximum of three cmos input gates (15-pf load. total for all three) with a 66-mhz clock. |
1pcs | 100pcs | 1k | 10k | ||
型 号:ad1020ar 厂 家:adi 封 装:0633 批 号:smd 数 量:3500 说 明:特价出售,全新原装.部份无铅 |
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运 费: 所在地: 新旧程度: |
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联系人:林浩/林妮 |
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