ltc1595bcs8资料 | |
ltc1595bcs8 |
|
file size : 116 kb
manufacturer:linear description:rising edge of the clk pin. on the falling edge of the 8th clock the data in the serial shift register is latched into the parallel dar register. the dar remains powered up when- ever vdd is present. the serial data is clocked into the data pin starting with the msb first. this sequence of threshold select bits is shown in table 2. |
1pcs | 100pcs | 1k | 10k | ||
型 号:ltc1595bcs8 厂 家:linear 封 装:0611 批 号:smd 数 量:2775 说 明: |
|||||
运 费: 所在地: 新旧程度: |
|||||
联系人:林浩/林妮 |
电 话:0755-82532799/82532766/83989559 |
手 机:13510168121/13725556003 |
qq:496982847/351622092 |
msn:linearic@hotmail.com |
传 真:0755-82532766 |
email:maxim_zi@126.com |
公司地址: 深圳市福田区佳和大厦b座1802室 门市部:华强广场 q2a114展销柜 |