ltc1659cms8资料 | |
ltc1659cms8 |
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file size : 116 kb
manufacturer:linear description:the ls160 and ls162 count modulo-10 in the bcd (8421) sequence from state 9 (hllh) they increment to state 0 (llll) the 161 and 163 count modulo-16 binary se- quence from state 15 (hhhh) they increment to state 0 (llll) the clock inputs of all flip-flops are driven in parallel through a clock buffer thus all changes of the q outputs (except due to master reset of the ls160) occur as a re- sult of and synchronous with the low-to-high transition of the cp input signal the circuits have four fundamental modes of operation in order of precedence asynchronous reset (ls160) synchronous reset (ls162) parallel load count-up and hold five control inputs master reset (mr ls160) synchronous reset (sr ls162) parallel enable (pe) count enable parallel (cep) and count enable trickle (cet) determine the mode of operation as shown in the |
1pcs | 100pcs | 1k | 10k | ||
型 号:ltc1659cms8 厂 家:linear 封 装:0611 批 号:smd 数 量:2775 说 明: |
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