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| mic4424bm资料 | |
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mic4424bm |
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file size : 116 kb
manufacturer: description:an industry-standard design-for-test (dft) mode is incorporated in the tms4x100 and tms4x100p. a cbr cycle with w low (wcbr) cycle is used to enter the test mode. in the test mode, data is written into and read from eight sections of the array in parallel. data is compared upon reading and if all bits are equal, the data-out terminal goes high. if any one bit is different, the data-out terminal goes low. any combination of read, write, read-write, or page-mode cycles can be used in the test mode. the test-mode function reduces test times by enabling the 4-mbit dram to be tested as if it were a 512k dram, where row address 10, column address 10, and column address 0 are not used. a ras-only or cbr refresh cycle is used to exit the dft mode. |
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| 1pcs | 100pcs | 1k | 10k | ||
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型 号：mic4424bm 厂 家： 封 装：0611 批 号： 数 量：2083 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：林浩/林妮 |
| 电 话：0755-82532799/82532766/83989559 |
| 手 机：13510168121/13725556003 |
| qq：496982847/351622092 |
| msn：linearic@hotmail.com |
| 传 真：0755-82532766 |
| email：maxim_zi@126.com |
| 公司地址： 深圳市福田区佳和大厦b座1802室 门市部：华强广场 q2a114展销柜 |
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