mu9c1640-55dc资料 | |
mu9c1640-55dc |
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file size : 116 kb
manufacturer: description:in a system, the 82c37a address and control outputs and data bus pins are basically connected in parallel with the system busses. an external latch is required for the upper address byte. while inactive, the controllers outputs are in a high impedance state. when activated by a dma request and bus control is relinquished by the host, the 82c37a drives the busses and generates the control signals to perform the data transfer. the operation performed by activating one of the four dma request inputs has previously been programmed into the controller via the command, mode, address, and word count registers. |
1pcs | 100pcs | 1k | 10k | ||
型 号:mu9c1640-55dc 厂 家: 封 装:0510 批 号: 数 量:3800 说 明: |
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运 费: 所在地: 新旧程度: |
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