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| tlv431aidbv资料 | |
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tlv431aidbv |
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file size : 116 kb
manufacturer: description:note 1: relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and the offset error have been nulled. note 2: no missing codes over temperature. note 3: conversion time is defined as the number of clock cycles (16) multiplied by the clock period. note 4: at sample rates below 10ksps, the input full-linear bandwidth is reduced to 5khz. note 5: the listed value of three sclk cycles is given for full-speed continuous conversions. acquisition time begins on the 14th ris- ing edge of sclk and terminates on the next falling edge of cnvst. the ic idles in acquisition mode between conversions. note 6: undersampling at the maximum signal bandwidth requires the minimum jitter spec for sinad performance. note 7: 1.5msps operation guaranteed for vl > 2.7v. see the typical operating characteristics section for recommended sampling speeds for vl < 2.7v. note 8: digital supply current is measured with the vih level equal to vl, and the vil level equal to gnd. |
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| 1pcs | 100pcs | 1k | 10k | ||
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型 号：tlv431aidbv 厂 家： 封 装：0628 批 号：dip/sop 数 量：6000 说 明： |
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运 费： 所在地： 新旧程度： |
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| 联系人：林浩/林妮 |
| 电 话：0755-82532799/82532766/83989559 |
| 手 机：13510168121/13725556003 |
| qq：496982847/351622092 |
| msn：linearic@hotmail.com |
| 传 真：0755-82532766 |
| email：maxim_zi@126.com |
| 公司地址： 深圳市福田区佳和大厦b座1802室 门市部：华强广场 q2a114展销柜 |
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